CDC 6600 Subroutines

Mark Smotherman. Last updated May 2003.

Introduction

... to do ...

Registers

        A - eight 18-bit address registers
        B - eight 18-bit index registers
        X - eight 60-bit arithmetic registers

        A0 - is a scratch register and does not cause a load or store
        placing an address in A1-A5 causes a load from memory to occur
            into the corresponding X1-X5 register
        placing an address in A6-A7 causes a store to memory to occur
            from the corresponding X6-X7 register

        B0 is hardwired to zero; B1 usually contains 1 by convention

Subroutine instructions

        RJ K - return jump - stores an unconditional branch to the
               current word address + 1 in the first word of the
               subroutine at address K and then begins executing
               instructions at address K+1

               (note: RJ is a 30-bit instruction but it "forces upper"
               alignment by the assembler so that the next instruction
               is on a 60-bit word boundary)


        EQ Bi,Bj,K - jump to K if Bi equals Bj

               EQ K - shorthand for EQ B0,B0,K - unconditional jump

Parameter passing

        typically six parameters (small values or addresses) can
            be passed in registers B1-B6

        the addresses of additional parameters can be stored in
            reserved words above the subroutine entry point

        the return value from a function can be passed back in X6

Calling program structure

           sb1 arg    / set b1 to address of "arg"

        call:
           rj  subr   / control will return to address call+1

Subroutine structure

        subr: bss 1   / reserve one word for storage of "eq call+1"

           sa1 b1     / load x1 using address in b1 (move b1 to a1
                      /     with load into x1 as a side-effect) 

           ... body of subroutine ...

           eq  subr   / return to caller via branch stored in subr


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mark@cs.clemson.edu