AMD 29000 Subroutines

Mark Smotherman. Last updated September 2002.

Introduction

The AMD 29000 family is a 32-bit RISC architecture introduced in 1988. Notable characteristics include:

Register conventions

        gr0         - reserved by hardware for indirect pointer access through
                      sr128-sr130 (ipa-ipc) to support instruction emulation
        rsp (gr1)   - register stack pointer (hardware)
        gr2-gr3     - reserved for condition code accumulator (29050 only)
        ...
        gr4-gr63 are not implemented
        ...
        gr64-gr95   - reserved for OS (access protected by sr7)
        gr96-gr111  - compiler temporaries and function return values
        gr112-gr115 - reserved for programmer
        gr116-gr120 - compiler temporaries
        tav (gr121) - trap argument vector
        tpc (gr122) - trap return pointer
        lrp (gr123) - large return pointer
        slp (gr124) - static link pointer
        msp (gr125) - memory stack pointer
        rab (gr126) - register stack bound
        rfb (gr127) - register stack bound

Subroutine call instructions

        call  lr0,address  - lr0 <- return address; PC <- address
        calli lr0,register - lr0 <- return address; PC <- register
        jmpi  lr0          - PC <- lr0
These are delayed branches; i.e., the effect of changing the PC is delayed by one instruction for each control transfer instruction.

Stack frame layout in the register stack

        caller's registers     callee's registers after adjusting
                               rsp by 16 bytes (i.e., 4 registers)
                                  +-------------+
                               lr0|             |<------- new rsp
                                  +-------------+
                               lr1|  frame ptr  |-.
                                  +-------------+ |
                               lr2|    local    | |
                                  +-------------+ |
                               lr3|    local    | |
           +-------------+        +-------------+ |
        lr0| return addr |<--->lr4| return addr | | < - - (old rsp)
           +-------------+        +-------------+ |
        lr1|  frame ptr  |<--->lr5|   old fp    | |
           +-------------+        +-------------+ |
        lr2|  parameter  |<--->lr6|  parameter  | |
           +-------------+        +-------------+ |
        lr3|  parameter  |<--->lr7|  parameter  | |
           +-------------+        +-------------+ |
           |             |                      <-'
           +-------------+
           |    ...      |

Calling program structure

           ...

           ... place parameters in lr2, lr3, etc. ...

           call  lr0,subr

           (delay slot instruction)

           ...

Subroutine structure

        subr:
                                ! prolog:
           sub   rsp,rsp,N      ! adjust register stack pointer to provide
                                !   space for locals and for new fp and ra
                                !   (N is determined as 4 times the number
                                !   of new registers desired in the frame)
           asgeu SPILL,rsp,rab  ! assert, trap on register window overflow
           add   lr1,rsp,M      ! set up frame pointer to define size of
                                !   activation record for this subroutine

           ... body of subroutine ...

                                ! epilog:
           add   rsp,rsp,N      ! restore caller's register stack pointer
           jmpi  lr0            ! return (delayed branch)
           asleu FILL,lr1,rfb   ! assert, trap on register window underflow


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mark@cs.clemson.edu