Mark Smotherman. Last updated October 2009
(under construction)
The Flexible Processor family from CDC was a set of designs based on an array of processors, each of which used a horizontally-microcoded (VLIW) instruction set.
" basic microinstruction statement format " " [label] [constant] op [jump] " " " a symbolic label or a period in column 1 indicates a new microinstruction " " one 16-bit constant can be defined in each microinstruction " " the operation is formatted as " " unit=op(src_1,src_2/clock_src_1,clock_src_2) " " if not specified, the clock values are set implicitly " " if the op is unchanged from the last use of that unit then " " unit=*(src_1,src_2/clock_src_1,clock_src_2) " " a jump has multiple types, e.g., it can jump to the constant field, JK(), " or jump to the current address plus the constant, JAK() " " IF(cond)jump(/clock) " " (there can be multiple jump conditions specified) " " " " adder example " C1 A0=ADD(D0,A0) " add output of data memory D0 to the " output of adder A0 " C2 NOP " wait one cycle " C3 K=LABEL1 M0=MLT(A0,A0) " adder output is now available for use " at another unit, e.g., multiplier IF(A0.OV) JK() " overflow, carry, and msb of the result " and zero conditions are available " for testing
Acknowledgements
My thanks to Gale Allen, Dan Baxter, Michael Covington, Eugene Miya, and Mark Pendergast for their help and advice about the CDC AFP family, and to John Savard for sending me the link to the Cyberplus manual
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mark@cs.clemson.edu