(replace later with more professional photos)
Left - single board similar to those used in earlier CDC computers
Middle - cordwood module similar to those used in the 6000 series
Right - eight-board module similar to those used in the 7600 (this particular module may be from a Cyber 175; the covers have been removed for this photo; the transistors are the small gray dots)
See a photo of a 7600 circuit card from London University Computing Centre; also a close-up photo of the transistors
stub page for collecting 7600 info
Part of my interest lies in the fact that Cray simplified and improved the instruction issue logic in the 7600 over the 6600. E.g., the 6600 took two cycles to issue a 30-bit instruction, whereas the 7600 could issue one instruction per cycle regardless of instruction length.
The 6600 central processor with its scoreboard-controlled out-of-order issue was innovative and is very well known, but the 7600 central processor, designed by Cray (Thronton had gone off to do the STAR-100) is probably a cleaner, more unified design than the 6600. The instruction set was very similar to the 6600's. Although it may sound heretical, I think the pipelined, in-order issue 7600 is the 6600 "done right."
-- Jim Smith, 2001
See also the analysis of the 6600 and 7600 parallel function units and instruction issue by Roland Ibbett and Nigel Topham.
Furthermore, Cray chose to use high-speed discrete transistors in an eight-board circuit module in an era when other manufacturers were moving to integrated circuitry.
In 1978, Science magazine reported that CDC sold "400 of its CDC 6600 models and 75 of its CDC 7600 models." These figures likely include other members of the 6000 series such as the 6400 or perhaps the Cyber series derivatives of the 6600 and 7600. (E.g., CHM says "about 100" CDC 6600s were sold. The Cray Museum says, "About forty 7600 computers were eventually sold before CDC replaced the 7600 with the CYBER series.")
There are some reports about early problems with the 7600 at CERN and NCAR:
With a speed of just over 10 Mips (millions of instructions per second) and superb floating-point performance, the 7600 was, for its time, a veritable "Ferrari" of computing. But it was a Ferrari with a very difficult running-in period. The system software was again late and inadequate. In the first months the machine had a bad ground-loop problem causing intermittent faults and eventually requiring all modules to be fitted with sheathed rubber bands. It was a magnificent engine for its time whose reliability and tape handling just did not perform to the levels needed, in particular by the electronic experiments.
-- Chris Jones, "Computing at CERN: the mainframe era," CERN Courier, Sept. 2004
The CDC 6600 and 7600 each served NCAR for nearly twelve years, overlapping residency by six years. The 7600 was found to be less stable than the 6600. This caused SCD and NCAR scientists to develop, over a period of several years, robust job and file recovery procedures in the operating system and the equivalent of checkpoint-restart in the models themselves.
-- Tom Engel, "HPC at NCAR: Past, Present and Future," CUG 2010
The CIW [Current Instruction Word] register is divided into four 15-bit parcels. All four parcels are loaded when an instruction word is read from the IWS [Instruction Word Stack]. An instruction issues from the CIW register when the conditions in the functional units and operating registers are such that the instruction will be executed without conflicting with previously issued instructions. The other parcels are then left-shifted in the CIW register by either 15 bits or 30 bits, depending upon the instruction format.
p. 107: "[Dennis] GRINNA: ... at the wrapup on the 6600 Bill [Bhend] spent quite a bit of time studying the usage of some of these features that were in the 6600 and how much utility they really had."
pp. 107-108: "BHEND: They wanted to find out just how important it was to have things in the computer like the 'stunt' box for example. If you could take a program and go through it and change the program so that it would run faster or as fast, without having things they had in the 6600 to implement high speed execution. They wanted to find out if they could simplify the control basically. ... I took several programs that we had run on the machine and went through the code and changed it so that there wouldn't be any delays waiting for something from memory or waiting for an answer to be put into an X register. We found out that if we did that there were lots of ways that we could make control much simpler on the 7600."
p. 113: "[Robert] MOE: The net of the simplification of the 6600 as I remember being told was it cost 7% in degradation, it took out a significant amount of hardware and that 7% in degradation was strictly prohibiting further issues until the instruction could be completed."
p. 121: "NEIL [Lincoln]: ... The segmenting idea [pipelining the multiply unit], was that Seymour's [idea] again? And that was just to solve the problem of the issue? [Dennis] GRINNA: Yes."
Acknowledgement: My thanks to Joe Cychosz for his help with CDC and Cray hardware details.
The Cyber 76 (ca. 1971) was an update of the CDC 7600, and the Cyber 175 (ca. 1973) and Cyber 176 were updates of the Cyber 76. The Cyber 175 used discrete transistors for the CPU. See the 1975 Cyber 170 Systems Hardware Handbook on Bitsavers for more information.
The Cyber 170 Model 875 (ca. 1982) used chips as well as discrete transistors within a 7600-like module so that the same type of frames and cooling could continue to be used. See a picture of a Cyber 170/875 module here, and the internal boards here.
[6600 page] [8600 page] [History page] [Mark's homepage] [CPSC homepage] [Clemson Univ. homepage]