This file can be found in http://www.cs.clemson.edu/~mark/3300.html
Course Description: Introduction to the structure of computer systems. Various hardware/software configurations are explored and presented as integrated systems. Topics include digital logic, basic computer organization, computer arithmetic, memory organization, input/output organizations, interrupt processing, multiprocessors, and cluster computers.
Learning Outcomes: Students who successfully complete this course should be able to:
Prerequisites: CPSC 2120 and CPSC 2310 with grades of C or better.
Meetings: 3:30-4:45 TTh, 119 McAdams Hall.
Instructor: Mark Smotherman, 108 McAdams Hall, email@example.com, 656-5878
Office Hours: 2:00-3:30 MW; also email since I'm usually available at other times
Drop Days: Drop without record by January 24; drop without final grade by March 16.
Clemson Statement of Academic Integrity: "As members of the Clemson University community, we have inherited Thomas Green Clemson's vision of this institution as a 'high seminary of learning.' Fundamental to this vision is a mutual commitment to truthfulness, honor, and responsibility, without which we cannot earn the trust and respect of others. Furthermore, we recognize that academic dishonesty detracts from the value of a Clemson degree. Therefore, we shall not tolerate lying, cheating, or stealing in any form."
Work turned in for credit in a previous class: When approporiate and when fully documented, you may reuse your own work from a previous class. For example, if you are reusing parts of a program written for a previous course, add a notice to your program header comments about the scope of the reuse and the course in which the work was previously submitted.
Accessibility Statement: Clemson University values the diversity of our student body as a strength and a critical component of our dynamic community. Students with disabilities or temporary injuries/conditions may require accommodations due to barriers in the structure of facilities, course design, technology used for curricular purposes, or other campus resources. Students who experience a barrier to full access to this class should let the professor know, and make an appointment to meet with a staff member in Student Accessibility Services as soon as possible. You can make an appointment by calling 864-656-6848, by emailing firstname.lastname@example.org, or by visiting Suite 239 in the Academic Success Center building. Appointments are strongly encouraged - drop-ins will be seen if at all possible, but there could be a significant wait due to scheduled appointments. Students who receive Academic Access Letters are strongly encouraged to request, obtain and present these to their professors as early in the semester as possible so that accommodations can be made in a timely manner. It is the student's responsibility to follow this process each semester. You can access further information here: http://www.clemson.edu/campus-life/campus-services/sds/.
Title IX (Sexual Harassment) Statement: Clemson University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender, pregnancy, national origin, age, disability, veterans status, genetic information or protected activity in employment, educational programs and activities, admissions and financial aid. This includes a prohibition against sexual harassment and sexual violence as mandated by Title IX of the Education Amendments of 1972. This policy is located at http://www.clemson.edu/campus-life/campus-services/access/title-ix/. Ms. Alesia Smith is the Clemson University Title IX Coordinator, and the Executive Director of Equity Compliance. Her office is located at 110 Holtzendorff Hall, 864.656.3181 (voice) or 864.656.0899 (TDD).
Note: The course syllabus is a general plan for the course. Deviations may be necessary, and announcements will be made in class if and when such changes occur.
Links to additional materials, notes, etc.
Steve Ward. 6.004 Computation Structures. Spring 2009. Massachusetts Institute of Technology: MIT OpenCourseWare, https://ocw.mit.edu. License: Creative Commons BY-NC-SA.
Joel Emer, Krste Asanovic, and Arvind. 6.823 Computer System Architecture. Fall 2005. Massachusetts Institute of Technology: MIT OpenCourseWare, https://ocw.mit.edu. License: Creative Commons BY-NC-SA.
Chapter 1 - Computer Abstractions and Technology course introduction, range of computing, markets, technology performance measures, clock rates, compiler optimization, benchmarks CPU performance equation (p. 35) Amdahl's Law (p. 51, 635) MIPS (p. 53) -- HW1 -- Project 1 Appendix B - Basics of Logic Design combinational and sequential design, Boolean logic, truth table, algebraic manipulation, Karnaugh map, gate, decoder, multiplexor, half adder, full adder, ripple carry adder, bus, tri-state buffer, RS latch, flip flop, register, counter -- HW2 -- Exam 1 Chapter 4 -- The Processor datapaths, register transfers, control signals, control logic, instruction execution, hardwired implementation, microprogramming, instruction pipelining, stages, latches (interstage buffers), data hazards, forwarding, branching, branch prediction, parallelism, superscalar, out-of-order execution, VLIW, EPIC -- HW3 -- Exam 2 Review - Memory Locations and Addresses byte addressability, alignment (p. 84), big-endian / little-endian (p. B-43) Chapter 5 - Exploiting the Memory Hierarchy two-dimensional organization of RAM, SRAM, DRAM, fast page mode, memory controller, ROM locality of reference, memory hierarchy policies: fetch, placement, replacement, write hit, write miss caches: mapping, performance virtual memory: address translation, TLB -- HW4 -- Project 2 Chapter 6 - Parallel Processors parallel processing, array processors, SIMD, subword parallelism, shared memory, distributed memory, interconnection networks, SMP, UMA, NUMA, cache coherence, message passing -- HW5 -- Project 3 -- Final Exam - Friday, May 4, 11:30 am - 2:00 pm
Spring 2016 projects were a paper on the geometric mean, a program to display cycle-by-cycle actions of an instruction pipeline, and a program to calculate the hit rate and bank prediction accuracy of a pseudo-set-associative cache. Spring 2017 projects were a simulator for a microprogrammed processor, a mini-DFA for a subset of MIPS instructions, and a simulator for simple two-processor MSI cache coherency.
[Mark's homepage] [CPSC homepage] [Clemson Univ. homepage]