231 Fall 2010 -- Exam 2 Name: _________________
No calculators.
1. Convert these numbers between signed decimal and 16-bit two's complement
representation in hexadecimal. (4 pts. each)
signed decimal two's complement (hex)
a. +135 ________
b. ________ 0x0135
c. -135 ________
d. ________ 0xfe35
2. Give the most negative 4-bit two's complement number in two formats:
(2 pts. each)
a. hexadecimal representation (two's complement): ____________
b. decimal representation: ____________
3. Give the most positive 4-bit two's complement number in two formats:
(2 pts. each)
a. hexadecimal representation (two's complement): ____________
b. decimal representation: ____________
4. Show the hexadecimal results of binary addition and subtraction of signed
16-bit two's complement numbers. Identify any signed overflows. (4 pts. each)
a. 0x7531 b. 0x7531 c. 0x7531 d. 0x7531
+0xaaff +0xffaa -0xffaa -0xaaff
------- ------- ------- -------
5. Show the hexadecimal results of logic operations on 16-bit binary numbers.
(4 pts. each)
a. 0x7531 b. 0x7531 c. 0x7531 shift d. 0x7531 shift
or 0x3333 and 0x3333 left by 6 right logical by 7
--------- ---------- ------------ ------------------
6. Give the names of the following condition code. (4 pts.)
N: V:
Z: C:
7. Give a sequence of SPARC shift and add instructions to multiply the value
in register %o0 by 100 decimal and place the result in register %o1. You
may use registers %o2 and %o3 as temporaries. (Do not call .mul) (4 pts.)
8. Give a sequence of SPARC instructions to extract the second byte from the
left of a word (i.e., the next to most significant byte) in register %o0
and place it right-aligned and sign-extended in register %o1. (E.g.,
0x87654321 should become 0x00000065 and 0x00abcdef should become 0xffffffab.)
(4 pts.)
9. Show the little-endian and big-endian byte ordering of the following data
values. Start the byte numbering of c[] and i at address 100. (8 pts.)
char c[4] = {'a', 'b', 'c', '\0'};
int i = 0x12345; /* int defaults to a 32-bit word */
byte address: 100 101 102 103 104 105 106 107
big-endian ordering: ___ ___ ___ ___ ___ ___ ___ ___
little-endian ordering: ___ ___ ___ ___ ___ ___ ___ ___
10. Show the SPARC code for the following program segment. Use a simple series
of shifts and adds to accomplish the multiplication. (12 pts.)
term = 0; You may assume these register defines:
sum = 0; define(term_r,l1)
i = 1; define(sum_r,l2)
while( i <= 10 ){ define(i_r,l3)
term = term + 2*i - 1;
sum = sum + term;
i = i + 1;
}
Extra Credit: what series does the above code segment compute? That is,
give the function f(i) for sum over 1<=i<=10 of f(i). (2 pts.)
11. Show the HARDWARE STEPS required in multiplication of two unsigned 4-bit
binary numbers, 1010 times 1111. (1010 is the multiplicand and 1111 is
the multiplier.) The details of mulscc are not required, but you should
show the C (carry) and 4-bit ACC, MQ, and MDR registers, and be sure to
place the multiplicand and multiplier in the correct registers. (12 pts.)
(Note: no credit will be given for mere paper and pencil multiplication.)
X1. Show the HARDWARE STEPS required in restoring division of an unsigned
8-bit binary dividend, 01111101, by a 4-bit unsigned binary divisor,
1011. Use the C (carry) and 4-bit ACC, MQ, and MDR registers, and be
sure to place the dividend and divisor in the correct registers. (10 pts.)